Khác biệt giữa bản sửa đổi của “Chip cầu nam”
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Dòng 3:
'''Chip cầu nam''', hay còn gọi là [[Input/output|I/O]] Controller Hub (ICH), là một chip đảm nhiệm những việc có tốc độ chậm của [[bo mạch chủ]] trong [[chipset]]. Khác với [[chip cầu bắc]], chip cầu nam không được kết nối trực tiếp với [[CPU]]. Đúng hơn là chip cầu bắc kết nối chip cầu nam với CPU.
==Overview==
Because the southbridge is further removed from the CPU, it is given responsibility for the slower devices on a typical [[microcomputer]]. A particular southbridge will usually work with several different northbridges, but these two chips must be designed to work together; there is no industry wide standard for interoperability between different core logic chipset designs. Traditionally this interface between northbridge and southbridge was simply the PCI bus, however since this created a performance bottleneck, most current chipsets use a different (often proprietary) interface with higher performance.
===Etymology===
The name is derived from drawing the architecture in the fashion of a map. The CPU would be at the top of the map at due north. The CPU would be connected to the chipset via a fast bridge (the [[Northbridge (computing)|northbridge]]) located ''north'' of other system devices as drawn. The northbridge would then be connected to the rest of the chipset via a slow bridge (the southbridge) located ''south'' of other system devices as drawn.
===Functionality===
The functionality found on a contemporary southbridge includes:
*[[Peripheral Component Interconnect|PCI bus]]. The PCI bus support includes the traditional PCI specification, but may also include support for [[PCI-X]] and [[PCI Express]].
*[[Industry Standard Architecture|ISA bus]] or [[Low Pin Count|LPC Bridge]]. Though the ISA support is rarely utilized, it has interestingly managed to remain an integrated part of the modern southbridge. The LPC Bridge provides a data and control path to the SIO (the normal attachment for the keyboard, mouse, parallel port, serial port, [[Infra-red|IR port]], and floppy controller) and [[BIOS]] ROM ([[Flash memory|flash]]).
*[[System Management Bus|SMBus]]. The SMBus is used to communicate with other devices on the motherboard (e.g. system fans).
*[[Direct memory access|DMA controller]]. The DMA controller allows ISA or LPC devices direct access to [[main memory]] without needing help from the CPU.
*[[Programmable Interrupt Controller|Interrupt controller]]. The interrupt controller provides a mechanism for attached devices to get attention from the CPU.
*[[Advanced Technology Attachment|IDE (SATA or PATA) controller]]. The IDE interface allows direct attachment of system [[hard drives]].
*[[Real Time Clock]]. The real time clock provides a persistent time account.
*Power management ([[Advanced Power Management|APM]] and [[Advanced Configuration and Power Interface|ACPI]]). The APM or ACPI functions provide methods and signaling to allow the computer to sleep or shut down to save power.
*[[Nonvolatile BIOS memory]]. The system [[CMOS]], assisted by battery supplemental power, creates a limited [[non-volatile]] storage area for system configuration data.
* [[AC97]] or [[Intel High Definition Audio]] sound interface
Optionally, the southbridge will also include support for [[Ethernet]], [[Redundant array of independent disks|RAID]], [[Universal Serial Bus|USB]], [[audio codec]], and [[FireWire]]. Rarely, the southbridge may also include support for the keyboard, mouse, and serial ports, but normally these devices are attached through another device referred to as the [[Super I/O]].
==Xem thêm==
* [[Chip cầu bắc]]
* [[Chipset]]
[[Thể loại:Bo mạch chủ]]
[[Thể loại:Phần cứng máy tính]]
{{đang dịch|tiếng Anh}}
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