Khác biệt giữa các bản “Itanium”

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{{đang dịch 2 (nguồn)|ngày=28|tháng=04|năm=2012}}
 
{{Infobox CPU
| name=Itanium
 
'''Itanium''' ({{IPAc-en|aɪ|ˈ|t|eɪ|n|i|ə|m}} {{respell|eye|TAY|nee-əm}}) là một vi xử lý thuộc họ vi xử lý của Intel 64 bit thực thi '''kiến trúc Intel Itanium''' (trước đây gọi là '''IA-64''').
 
Intel markets the processors for [[enterprise server]]s and [[high-performance computing]] systems. The [[computer architecture|architecture]] originated at [[Hewlett-Packard]] (HP), and was later jointly developed by HP and Intel.
 
The Itanium architecture is based on explicit [[instruction-level parallelism]], in which the [[compiler]] decides which instructions to execute in parallel. This contrasts with other [[superscalar]] architectures, which depend on the processor to manage instruction dependencies at runtime. In all Itanium models, up to and including ''[[Tukwila (processor)|Tukwila]]'', cores execute up to [[#Instruction execution|six]] instructions per clock cycle. The first Itanium processor, [[List of Intel codenames|codenamed]] ''Merced'', was released in 2001.
 
Itanium-based systems have been produced by HP (the [[HP Integrity Servers]] line) and several other manufacturers. {{As of|2008}}, Itanium was the fourth-most deployed microprocessor architecture for enterprise-class systems, behind [[x86-64]], [[IBM POWER]], and [[SPARC]].<ref name="ITJungle">{{cite web
| url=http://www.itjungle.com/tlb/tlb052708-story03.html
| title=The Server Biz Enjoys the X64 Upgrade Cycle in Q1
| accessdate=2008-10-29
| last=Morgan
| first=Timothy
| authorlink=
| date=2008-05-27
| work=IT Jungle
}}</ref>
The most recent processor, ''Tukwila'', originally planned for release in 2007, was released on February 8, 2010.<ref name="INQ09">{{cite web
| url=http://www.theinquirer.net/inquirer/news/1137434/tukwila-delayed-2010
| title=Tukwila delayed until 2010
| accessdate=2009-05-21
| last=Demerjian
| first=Charlie
| authorlink=
| date=2009-05-21
| work=The Inquirer
}}</ref><ref name="eweek-tukwila"/>
 
== Thị trường tiếp nhận ==
 
=== Thị trường máy chủ cao cấp ===
| publisher=Intel
| accessdate=2011-03-23}}</ref>
 
=== Các thị trường khác ===
 
Although remaining in development, and having attained a limited success in the niche of high-end computing, Intel had originally hoped to make Itanium a replacement for the original [[x86]] architecture.<ref>{{cite web
| url=http://features.techworld.com/operating-systems/2690/will-intel-abandon-the-itanium/
| title=Once touted by Intel as a replacement for the x86 product line, expectations for Itanium have been throttled well back.
| publisher=Features.techworld.com
| accessdate=2010-12-19}}</ref>
 
[[AMD]] chose a different direction, designing the less radical [[x86-64]], a 64-bit extension to the existing x86 architecture, which Microsoft then supported, forcing Intel to introduce the same extension in its own x86-based processors.<ref>[http://www.theinquirer.net/inquirer/news/1029651/why-intels-prescott-will-use-amd64--extensions|Why Intel's Prescott will use AMD64 extensions] retrieved on 2009-10-07</ref>
These designs can run existing 32-bit applications at native hardware speed, while offering support for 64-bit memory addressing and other enhancements to new applications.<ref name="vance late"/> This architecture has now become the predominant 64-bit architecture in the desktop and portable market. Although some Itanium-based workstations were initially introduced by companies such as [[Silicon Graphics|SGI]], they are no longer available.
 
== Lịch sử ==
 
[[Image:Itanium Sales Forecasts edit.png|thumb|right|400px|Itanium Server Sales forecast history.<ref name="IDC_chart">{{cite web
| url=http://news.com.com/2300-1006_3-5873647-1.html
| title=Mining Itanium
| accessdate=2007-03-19
| last=
| first=
| authorlink=
| date=2005-12-07
| work=CNet News
}}</ref>
<ref name="IDC 2006">{{cite web
| url=http://news.com.com/Analyst+firm+offers+rosy+view+of+Itanium/2100-1006_3-6038932.html
| title=Analyst firm offers rosy view of Itanium
| accessdate=2007-03-20
| last=Shankland
| first=Stephen
| authorlink=
| date=2006-02-14
| work=[[CNet]] News
}}</ref>]]
 
=== Giai đoạn phát triển: 1989–2000 ===
 
In 1989, HP determined that [[reduced instruction set computer]] (RISC) architectures were approaching a processing limit at one [[Instructions Per Cycle|instruction per cycle]]. HP researchers investigated a new architecture, later named [[explicitly parallel instruction computing]] (EPIC), that allows the processor to execute multiple [[instruction (computer science)|instructions]] in each clock cycle. EPIC implements a form of [[very long instruction word]] (VLIW) architecture, in which a single instruction word contains multiple instructions. With EPIC, the [[compiler]] determines in advance which instructions can be executed at the same time, so the microprocessor simply executes the instructions and does not need elaborate mechanisms to determine which instructions to execute in parallel.<ref name="HP_Labs">{{cite web
| url=http://www.hpl.hp.com/news/2001/apr-jun/itanium.html
| title=Inventing Itanium: How HP Labs Helped Create the Next-Generation Chip Architecture
| accessdate=2007-03-23
| last=
| first=
| authorlink=
| month=June
| year=2001
| work=[[Hewlett-Packard|HP]] Labs
}}</ref>
The goal of this approach is twofold: to enable deeper inspection of the code at compile time to identify additional opportunities for parallel execution, and to simplify processor design and reduce energy consumption by eliminating the need for runtime scheduling circuitry.
 
HP believed that it was no longer cost-effective for individual enterprise systems companies such as itself to develop proprietary microprocessors, so it partnered with Intel in 1994 to develop the IA-64 architecture, derived from EPIC. Intel was willing to undertake a very large development effort on IA-64 in the expectation that the resulting microprocessor would be used by the majority of enterprise systems manufacturers. HP and Intel initiated a large joint development effort with a goal of delivering the first product, Merced, in 1998.<ref name="HP_Labs"/>
 
During development, Intel, HP, and industry analysts predicted that IA-64 would dominate in servers, workstations, and high-end desktops, and eventually supplant RISC and [[complex instruction set computer]] (CISC) architectures for all general-purpose applications.<ref name="anand">{{cite web
| url=http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2598
| title=Itanium–Is there light at the end of the tunnel?
| accessdate=2007-03-23
| last=De Gelas
| first=Johan
| authorlink=
| date=2005-11-09
| work=[[AnandTech]]
}}</ref>
<ref name="Venturebeat">{{cite web
| url=http://venturebeat.com/2009/05/08/exit-interview-retiring-intel-chairman-craig-barrett-on-the-industrys-unfinished-business/
| title=Exit interview: Retiring Intel chairman Craig Barrett on the industry’s unfinished business
| accessdate=2009-05-17
| last=Takahashi
| first=Dean
| authorlink=
| date=2009-05-08
| work=VentureBeat
}}</ref>
[[Compaq]] and [[Silicon Graphics]] decided to abandon further development of the [[DEC Alpha|Alpha]] and [[MIPS architecture|MIPS]] architectures respectively in favor of migrating to IA-64.<ref name="cautionary">{{cite web
| url=http://news.zdnet.com/2100-9584-5984747.html
| title=Itanium: A cautionary tale
| accessdate=2007-11-01
| date=2005-12-07
| work=Tech News on ZDNet
| archiveurl=http://web.archive.org/web/20080209211056/http://news.zdnet.com/2100-9584-5984747.html
| archivedate=2008-02-09}}</ref>
 
Several groups developed operating systems for the architecture, including [[Microsoft Windows]], [[Linux]], and [[UNIX]] variants such as [[HP-UX]], [[Solaris (operating system)|Solaris]],<ref name="Solaris-Merced1">
{{cite web
| url=http://www.linuxtoday.com/news_story.php3?ltsn=1999-09-02-007-06-PS
| title=ComputerWorld: Solaris for IA-64 coming this fall
| last=Vijayan
| first=Jaikumar
| accessdate=2008-10-16
| date=1999-07-16
| work=Linuxtoday
}}</ref>
<ref name="Solaris-Merced2">
{{cite web
| url=http://www.eetimes.eu/18302255
| title=Core-logic efforts under way for Merced
| last=Wolfe
| first=Alexander
| accessdate=2008-10-16
| date=1999-09-02
| work=EE Times
}}{{dead link|date=April 2011}}</ref>
<ref name="Solaris-Merced3">
{{cite web
| url=http://findarticles.com/p/articles/mi_m0EIN/is_1998_March_10/ai_20369933
| title=Sun Introduces Solaris Developer Kit for Intel to Speed Development of Applications On Solaris; Award-winning Sun Tools Help ISVs Easily Develop for Solaris on Intel Today
| last=
| first=
| accessdate=2008-10-16
| date=1998-03-10
| work=Business Wire
}}
</ref>
[[Tru64 UNIX]],<ref name="cautionary"/> and [[Project Monterey|Monterey/64]]<ref>{{cite web
| url=http://www.news.com/2100-1001-229335.html
| title=Next-generation chip passes key milestone
| accessdate=2007-11-01
| date=1999-09-17
| work=CNET News.com
}}</ref>
(the last three were canceled before reaching the market). By 1997, it was apparent that the IA-64 architecture and the compiler were much more difficult to implement than originally thought, and the delivery of Merced began slipping.<ref name="geek1">
{{cite web
| url=http://news.cnet.com/2100-1001-228204.html
| title=Intel's Merced chip may slip further
| last=Shankland
| first=Stephen
| accessdate=2008-10-16
| date=1999-07-08
| work=CNET News
}}</ref>
Technical difficulties included the very high transistor counts needed to support the wide instruction words and the large caches.{{Citation needed|date=April 2010}} There were also structural problems within the project, as the two parts of the joint team used different methodologies and had slightly different priorities.{{Citation needed|date=April 2010}} Since Merced was the first EPIC processor, the development effort encountered more unanticipated problems than the team was accustomed to. In addition, the EPIC concept depends on compiler capabilities that had never been implemented before, so more research was needed.{{Citation needed|date=April 2010}}
 
Intel announced the official name of the processor, ''Itanium'', on October 4, 1999.<ref>{{cite web
| url=http://news.com.com/Intel+names+Merced+chip+Itanium/2100-1001_3-230932.html
| title=Intel names Merced chip Itanium
| accessdate=2007-04-30
| last=Kanellos
| first=Michael
| authorlink=
| date=1999-10-04
| work=[[CNET]] News.com
}}
</ref>
Within hours, the name ''Itanic'' had been coined on a [[Usenet]] newsgroup, a reference to [[RMS Titanic|''Titanic'']], the "unsinkable" [[ocean liner]] that sank in 1912.<ref>{{cite web
| url=http://groups.google.com/group/comp.sys.mac.advocacy/browse_thread/thread/52238e697177fa52/1d3f87d07be3797f#1d3f87d07be3797f
| title=Re:Itanium
| accessdate=2007-03-24
| last=Finstad
| first=Kraig
| authorlink=
| date=1999-10-04
| work=[[USENET]] group comp.sys.mac.advocacy
}}</ref>
"Itanic" has since often been used by ''[[The Register]]'',<ref name="Reg_Itanic">{{cite news
| author=Pete Sherriff
| title=AMD vs Intel – our readers write
| url=http://www.theregister.co.uk/1999/10/28/amd_vs_intel_our_readers/
| work=[[The Register]]
| date=1999-10-28
| accessdate=2010-04-06
| quote=
}}</ref>
and others,<ref>{{cite web
| url=http://techupdate.zdnet.com/techupdate/stories/main/0,14179,2828684,00.html
| title=Interpreting McNealy's lexicon
| accessdate=2007-03-19
| last=Berlind
| first=David
| authorlink=
| date=2001-11-30
| work=[[ZDNet]] Tech Update
}}</ref>
<ref>{{cite web
| url=http://www.theinquirer.net/default.aspx?article=33115
| title=Itanic shell game continues
| accessdate=2007-03-19
| last=Demerjian
| first=Charlie
| authorlink=
| date=2006-07-18
| work=[[The Inquirer]]
}} {{dead link|date=April 2012|bot=H3llBot}}</ref>
<ref>{{cite news
| url=http://www.nytimes.com/2003/10/19/business/market-watch-fawning-analysts-betray-investors.html
| title=Fawning Analysts Betray Investors
| accessdate=2010-10-19
| last=Morgenson
| first=Gretchen
| authorlink=
| date=2003-10-19
| work=[[New York Times]]
}}</ref>
to imply that the multibillion dollar investment in Itanium—and the early hype associated with it—would be followed by its relatively quick demise.
 
=== Itanium (Merced): 2001 ===
 
{{Infobox CPU
| name=Itanium (Merced)
| image=KL Intel Itanium ES.jpg
| caption=Itanium processor
| produced-start=June 2001
| produced-end=June 2002
| slowest=733
| slow-unit=MHz
| fastest=800
| fast-unit=MHz
| fsb-slowest=266
| fsb-slow-unit=MT/s
| manuf1=Intel
| core1=Merced
| size-from=
| size-to=
| arch=Itanium
| sock1=PAC418
| numcores=1
| l2cache=96 kB
| l3cache=2 or 4 MB
}}
By the time Itanium was released in June 2001, its performance was not superior to competing RISC and CISC processors.<ref>
{{cite news
| author=Linley Gwennap
| title=Itanium era dawns
| url=http://www.eetimes.com/op/showArticle.jhtml?articleID=18306008
| work=EE Times
| date=2001-06-04
| accessdate=2009-02-17
}}</ref>
Itanium competed at the low-end (primarily 4-CPU and smaller systems) with servers based on [[x86]] processors, and at the high end with [[International Business Machines|IBM's]] [[IBM POWER|POWER]] architecture and [[Sun Microsystems]]' [[SPARC]] architecture. Intel repositioned Itanium to focus on high-end business and [[High-performance computing|HPC]] computing, attempting to duplicate x86's successful "horizontal" market (i.e., single architecture, multiple systems vendors). The success of this initial processor version was limited to replacing [[PA-RISC]] in HP systems, [[DEC Alpha|Alpha]] in Compaq systems and [[MIPS architecture|MIPS]] in [[Silicon Graphics|SGI]] systems, though IBM also delivered a supercomputer based on this processor.<ref name="Thunder">{{cite web
| url=http://www.top500.org/system/ranking/5597
| title=Titan Cluster Itanium 800 MHz
| accessdate=2007-05-16
| work=[[TOP500]] web site
}}</ref>
POWER and SPARC remained strong, while the 32-bit x86 architecture continued to grow into the enterprise space, building on economies of scale fueled by its enormous installed base.
 
Only a few thousand systems using the original ''Merced'' Itanium processor were sold, due to relatively poor performance, high cost and limited software availability.<ref>{{cite news
| author=Michael Kanellos
| title=Itanium sales off to a slow start
| url=http://news.cnet.com/2100-1001-276880.html
| work=CNET News.com
| date=2001-12-11
| accessdate=2008-07-20
}}</ref>
Recognizing that the lack of software could be a serious problem for the future, Intel made thousands of these early systems available to independent software vendors (ISVs) to stimulate development. HP and Intel brought the next-generation Itanium 2 processor to market a year later.
 
{| class="wikitable"
|-
!colspan="5"|Itanium processor family
|- style="background:white"
| style="text-align:center;"|[[Image:Intel Itanium.png|90px|Original Itanium logo]]
| style="text-align:center;"|[[Image:Itanium 2.jpg|80px|Original Itanium 2 logo]]
| style="text-align:center;"|[[Image:Itanium 2 logo.png|104px|2006 Itanium 2 logo]]
| style="text-align:center;"|[[Image:Itanium logo.png|95px|2008 Itanium logo]]
| style="text-align:center;"|[[File:Itanium 2009 logo.png|62px|2009 Itanium logo]]
|-
!Original
!Version 2
!2006
!2008
!2009
|}
 
=== Itanium 2: 2002–2010 ===
 
{{Infobox CPU
| name=Itanium 2 (McKinley)
| image=KL Intel Itanium2.jpg
| image_size=250px
| caption=Itanium 2 processor
| produced-start=2002
| produced-end=present
| slowest=900
| fastest=1.73
| slow-unit=MHz
| fast-unit=GHz
| fsb-slowest=
| fsb-fastest=
| fsb-slow-unit=
| fsb-fast-unit=
| hypertransport-slowest=
| hypertransport-fastest=
| hypertransport-slow-unit=
| hypertransport-fast-unit=
| size-from=
| size-to=
| soldby=
| designfirm=Intel
| manuf1=Intel
| core1=McKinley
| core2=Madison
| core3=Hondo
| core4=Deerfield
| core5=Montecito
| core6=Montvale
| core7=Tukwila
| sock1=PAC611
| sock2=FC-LGA6 (LGA1248) ([[Tukwila (processor)|Itanium 9300 series]])
| pack1=
| brand1=
| arch=Itanium
| microarch=
| cpuid=
| code=
| numcores=1, 2 or 4
| l1cache=
| l2cache=256 kB on Itanium2 <br /> 256 kB(D) + 1MiB(I) or 512KiB(I) on (Itanium2 9x00 series)
| l3cache=1.5-24 MB
| application=
}}
 
[[Image:Itanium2.png|left|thumb|180px|Itanium 2 in 2003]]
 
The '''Itanium 2''' processor was released in 2002, and was marketed for enterprise servers rather than for the whole gamut of high-end computing. The first Itanium 2, code-named ''McKinley'', was jointly developed by HP and Intel. It relieved many of the performance problems of the original Itanium processor, which were mostly caused by an inefficient memory subsystem. ''McKinley'' contained 221 million transistors (of which 25 million were for logic), measured 19.5&nbsp;mm by 21.6&nbsp;mm (421&nbsp;mm<sup>2</sup>) and was fabricated in a 180&nbsp;nm, bulk CMOS process with six layers of aluminium metallization.<ref>Naffzinger, Samuel D. et al. (2002). "The implementation of the Itanium 2 microprocessor". ''IEEE Journal of Solid-State Circuits'', vol. 37, no. 11, pp. 1448–1460.</ref>
 
In 2003, [[Advanced Micro Devices|AMD]] released the [[Opteron]], which implemented its own 64-bit architecture ([[x86-64]]). Opteron gained rapid acceptance in the enterprise server space because it provided an easy upgrade from [[x86]]. Intel responded by implementing x86-64 in its [[Xeon]] microprocessors in 2004.<ref name="cautionary"/>
 
Intel released a new Itanium 2 family member, codenamed ''Madison'', in 2003. Madison used a 130&nbsp;nm process and was the basis of all new Itanium processors until Montecito was released in June 2006.
 
In March 2005, Intel announced that it was working on a new Itanium processor, codenamed ''[[Tukwila (processor)|Tukwila]]'', to be released in 2007. Tukwila would have four processor cores and would replace the Itanium bus with a new [[Common System Interface]], which would also be used by a new Xeon processor.<ref name="CSI">{{cite web
| url=http://www.eetimes.com/semi/news/showArticle.jhtml?articleID=60404677
| title=Intel preps HyperTransport competitor for Xeon, Itanium CPUs
| accessdate=2008-10-16
| last=Merritt
| first=Rick
| authorlink=
| date=2005-03-02
| work=EE Times
}}</ref>
Later that year, Intel revised Tukwila's delivery date to late 2008.<ref name="zdnet_2005_slip">{{cite web
| url=http://news.zdnet.com/2100-9584_22-5911316.html?tag=nl
| title=Intel pushes back Itanium chips, revamps Xeon
| accessdate=2007-03-17
| last=Shankland
| first=Stephen
| authorlink=
| date=2005-10-24
| work=[[ZDNet]] News
| archiveurl=http://web.archive.org/web/20080209211101/http://news.zdnet.com/2100-9584_22-5911316.html?tag=nl
| archivedate=2008-02-09}}</ref>
 
In November 2005, the major Itanium server manufacturers joined with Intel and a number of software vendors to form the Itanium Solutions Alliance to promote the architecture and accelerate software porting.<ref name="ISA">{{cite web
| url=http://www.itaniumsolutionsalliance.org
| title=Itanium Solutions Alliance
| accessdate=2007-05-16
| work=ISA web site
}}</ref>
The Alliance announced that its members would invest $10 billion in Itanium solutions by the end of the decade.<ref>{{cite web
| url=http://www.ednasia.com/article-12139-computingleadersannouncestrategyforneweraofmissioncriticalcomputing-Asia.html
| title=Computing Leaders Announce Strategy for New Era of Mission Critical Computing
| accessdate=2008-10-16
| last=Scott
| first=Bilepo
| authorlink=
| date=2006-01-26
| work=Itanium Solutions Alliance Press Release
}}</ref>
 
In 2006, Intel delivered ''Montecito'' (marketed as the '''Itanium 2 9000''' series), a dual-core processor that roughly doubled performance and decreased energy consumption by about 20 percent.<ref name="CW1">{{cite web
| url=http://www.computerworld.com/action/article.do?command=viewArticleBasic&articleId=9087319
| title='Tukwila’ Itanium servers due early next year, Intel says
| accessdate=2008-10-16
| last=Niccolai
| first=James
| authorlink=
| date=2008-05-20
| work=[[ComputerWorld]]
}}</ref>
 
Intel released the '''Itanium 2 9100''' series, codenamed ''Montvale'', in November 2007.<ref name="IW1">{{cite web
| url=http://www.informationweek.com/story/showArticle.jhtml?articleID=202800983
| title=Intel Unveils Seven Itanium Processors
| accessdate=2007-11-06
| last=Gonsalves
| first=Antone
| authorlink=
| date= 2007-11-01
| work=[[InformationWeek]]
}}</ref>
In May 2009 the schedule for Tukwila, its follow-on, was revised again, with release to OEMs planned for the first quarter of 2010.<ref name="INQ09" />
 
=== Itanium 9300 (Tukwila): 2010 ===
 
{{Main|Tukwila (processor)|}}
The '''Itanium 9300''' series processor, codenamed ''Tukwila'', was released on 8 February 2010 with greater performance and memory capacity.<ref name="eweek-tukwila">[http://www.eweek.com/c/a/IT-Infrastructure/New-Intel-Itanium-Offers-Greater-Performance-Memory-Capacity-349863/ New Intel Itanium Offers Greater Performance, Memory Capacity], By: Jeffrey Burt, 2010-02-08, eWeek</ref>
 
The device uses a 65&nbsp;nm process, includes two to four cores, up to 24 MB on-die caches, Hyper-Threading technology and integrated memory controllers. It implements [[ECC memory|double-device data correction]], which helps to fix memory errors. Tukwila also implements [[Intel QuickPath Interconnect]] (QPI) to replace the Itanium bus-based architecture. It has a peak interprocessor bandwidth of 96 GB/s and a peak memory bandwidth of 34 GB/s. With QuickPath, the processor has integrated memory controllers and interfaces the memory directly, using QPI interfaces to directly connect to other processors and I/O hubs. QuickPath is also used on Intel processors using the ''[[Nehalem (microarchitecture)|Nehalem]]'' microarchitecture, making it probable that Tukwila and Nehalem will be able to use the same chipsets.<ref name="Kittson">{{cite web
| url=http://www.zdnetasia.com/news/hardware/0,39042972,62021436,00.htm
| title=Intel updates Itanium line with 'Kittson'
| accessdate=2007-06-15
| last=Tan
| first=Aaron
| authorlink=
| date= 2007-06-15
| work=[[ZDNet]] Asia
}}</ref>
Tukwila incorporates four memory controllers, each of which supports multiple [[DDR3 SDRAM|DDR3]] [[DIMM]]s via a separate memory controller,<ref name=TukwilaDelay>{{cite web
| url=http://arstechnica.com/business/news/2009/02/intel-delays-quad-itanium-to-boost-platform-memory-capacity.ars
| title=Intel delays quad Itanium to boost platform memory capacity
| accessdate=2009-02-05
| last=Stokes
| first=Jon
| authorlink=
| date= 2009-02-05
| work=ars technica
}}</ref>
much like the Nehalem-based Xeon processor code-named ''[[Beckton (microprocessor)|Beckton]]''.<ref name="DailyTech Server">{{cite news
| url=http://www.dailytech.com/Intel+Aims+for+Efficiency+With+New+Server+Roadmap/article14224.htm
| first=Jansen
| last=Ng
| title=Intel Aims for Efficiency With New Server Roadmap
| date=10 February 2009
| publisher=[[DailyTech]]
| accessdate=2009-02-10
}}</ref>
 
== Thị phần ==
 
In comparison with its [[Xeon]] family of server processors, Itanium has never been a high-volume product for Intel. Intel does not release production numbers. One industry analyst estimated that the production rate was 200,000 processors per year in 2007.<ref>{{cite web
| url=http://www.internetnews.com/ent-news/article.php/3705016
| title=Intel Plows Forward With Itanium
| accessdate=2007-10-18
| last=Patrizio
| first=Andy
| authorlink=
| date= 2007-10-12
| work=InternetNews.com
}}</ref>
 
:Please note that the following numbers are based on ''servers'' and not on ''processors''. It is not reported how many processors or multi-core processors were built into these servers, and neither is it clear whether clustered servers were counted as a single server or not. Therefore there seems to be no valid method for reasonably determining how many processors are represented by that number of systems.
 
According to [[Gartner Inc.]], the total number of Itanium servers sold by all vendors in 2007 was about 55,000. This compares with 417,000 RISC servers (spread across all RISC vendors) and 8.4 million x86 servers. From 2001 through 2007, [[International Data Corporation|IDC]] reports that a total of 184,000 Itanium-based systems have been sold. For the combined POWER/SPARC/Itanium systems market, IDC reports that POWER captured 42% of revenue and SPARC captured 32%, while Itanium-based system revenue reached 26% in the second quarter of 2008.<ref>[[International Data Corporation|IDC]] World Wide Server Tracker, Q2'08</ref>
According to an IDC analyst, in 2007 HP accounted for perhaps 80% of Itanium systems revenue.<ref>{{cite web
| url=http://www.computerworld.com/action/article.do?command=viewArticleBasic&articleId=9087319
| title='Tukwila' Itanium servers due early next year, Intel says
| accessdate=2008-05-21
| last=Niccolai
| first=James
| authorlink =
| date= 2008-05-20
| work=Computerworld
}}</ref>
According to Gartner, in 2008 HP accounted for 95% of Itanium sales.<ref name="vance late"/> HP's Itanium system sales were at an annual rate of $4.4Bn at the end of 2008, and declined to $3.5Bn by the end of 2009,<ref name="Gartner 2009-q4">{{cite web
| url=http://www.theregister.co.uk/2010/02/24/gartner_q4_2009_servers/
| title=Gartner report card gives high marks to x64, blades
| accessdate=2010-02-25
| last=Morgan
| first=Timothy Prickett
| authorlink=
| date= 2010-02-24
| work=TheRegister.com
}}</ref>
compared to a 35% decline in UNIX system revenue for Sun and an 11% drop for IBM, with an x86-64 server revenue increase of 14% during this period.
 
== Kiến trúc ==
 
{{Redirect|IA-64|AMD64 and Intel64 architecture|x86-64}}
{{Infobox CPU architecture
| name=Intel Itanium Architecture
| designer=[[Hewlett-Packard|HP]] and [[Intel Corporation|Intel]]
| bits=64
| introduced=2001
| version=
| design=EPIC
| type=Register-Register
| encoding=
| branching=
| endianness=Selectable
| extensions=
| open=
| registers=<br/>
* 128 64-bit general purpose registers
* 128 82-bit floating-point registers
* 64 1-bit predicate registers
}}
 
[[Image:Itanium arch.png|thumb|The Intel Itanium architecture]]
 
Intel has extensively documented the Itanium [[instruction set]] and [[microarchitecture]],<ref>{{cite web
| url=http://developer.intel.com/design/itanium/manuals.htm
| title=Intel Itanium Processor Manuals
| accessdate=2007-05-16
| work=[[Intel]] web site
}}</ref>
and the technical press has provided overviews.<ref name="anand"/><ref name="geek1"/> The architecture has been renamed several times during its history. HP originally called it ''PA-WideWord''. Intel later called it ''IA-64'', then ''Itanium Processor Architecture'' (IPA),<ref>{{cite web
| url=http://www.hpworks.org.uk/newsletter/ping-year-ago.rtf
| title=HPWorks Newsletter
| accessdate=2008-01-24
| month=September
| year=2001
}}</ref>
before settling on ''Intel Itanium Architecture'', but it is still widely referred to as ''IA-64''.
 
It is a 64-bit register-rich explicitly parallel architecture. The base data word is 64 bits, byte-addressable. The [[logical address]] space is 2<sup>64</sup> bytes. The architecture implements [[branch predication|predication]], [[speculative execution|speculation]], and [[branch prediction]]. It uses a hardware [[register renaming]] mechanism rather than simple register windowing for parameter passing. The same mechanism is also used to permit parallel execution of loops. Speculation, prediction, predication, and renaming are under control of the compiler: each instruction word includes extra bits for this. This approach is the distinguishing characteristic of the architecture.
 
The architecture implements 128 integer [[processor register|registers]], 128 [[floating point]] registers, 64 one-bit predicates, and eight branch registers. The floating point registers are 82 bits long to preserve precision for intermediate results.
 
=== Chỉ dẫn thực thi ===
 
Each 128-bit instruction word contains three [[instruction (computer science)|instructions]], and the fetch mechanism can read up to two instruction words per clock from the L1 [[CPU cache|cache]] into the pipeline. When the compiler can take maximum advantage of this, the processor can execute six instructions per clock cycle. The processor has thirty functional execution units in eleven groups. Each unit can execute a particular subset of the [[instruction set]], and each unit executes at a rate of one instruction per cycle unless execution stalls waiting for data. While not all units in a group execute identical subsets of the instruction set, common instructions can be executed in multiple units.
 
The execution unit groups include:
* Six general-purpose ALUs, two integer units, one shift unit
* Four data cache units
* Six multimedia units, two parallel shift units, one parallel multiply, one [[Hamming weight|population count]]
* Two 82-bit floating-point [[multiply–accumulate]] units, two [[SIMD]] floating-point multiply–accumulate units (two 32-bit operations each)<ref>Sharangpani, Harsh; Arora, Ken (2000). "Itanium Processor Microarchitecture". ''[[IEEE Micro]]''. pp. 38–39.</ref>
* Three branch units
 
The compiler can often group instructions into sets of six that can execute at the same time. Since the floating-point units implement a multiply–accumulate operation, a single floating point instruction can perform the work of two instructions when the application requires a multiply followed by an add: this is very common in scientific processing. When it occurs, the processor can execute four [[FLOP]]s per cycle. For example, the 800&nbsp;MHz Itanium had a theoretical rating of 3.2&nbsp;G[[FLOPS]] and the fastest Itanium 2, at 1.67&nbsp;GHz, was rated at 6.67&nbsp;GFLOPS.
 
=== Kiến trúc bộ nhớ ===
 
From 2002 to 2006, Itanium 2 processors shared a common cache hierarchy. They had 16&nbsp;kB of Level 1 instruction cache and 16&nbsp;kB of Level 1 data cache. The L2 cache was unified (both instruction and data) and is 256&nbsp;kB. The Level 3 cache was also unified and varied in size from 1.5&nbsp;MB to 24&nbsp;MB. The 256&nbsp;kB L2 cache contains sufficient logic to handle [[semaphore (programming)|semaphore]] operations without disturbing the main [[arithmetic logic unit]] (ALU).
 
Main memory is accessed through a [[computer bus|bus]] to an off-chip [[chipset]]. The Itanium 2 bus was initially called the McKinley bus, but is now usually referred to as the Itanium bus. The speed of the bus has increased steadily with new processor releases. The bus transfers 2×128 bits per clock cycle, so the 200&nbsp;MHz McKinley bus transferred 6.4&nbsp;GB/s, and the 533&nbsp;MHz Montecito bus transfers 17.056&nbsp;GB/[[Second#International second|s]]<ref>{{cite web
| last=Cataldo
| first=Anthony
| title=Intel outfits Itanium processor for faster runs
| work=[[Electronic Engineering Times|EE Times]]
| date= 2001-08-30
| url=http://www.eetimes.com/conf/idf/showArticle.jhtml?articleID=18306162&kc=3172
| accessdate=2007-12-06
}}</ref>
 
=== Các thay đổi kiến trúc ===
 
Itanium processors released prior to 2006 had hardware support for the [[IA-32]] architecture to permit support for legacy server applications, but performance for IA-32 code was much worse than for native code and also worse than the performance of contemporaneous x86 processors. In 2005, Intel developed the [[IA-32 Execution Layer]] (IA-32 EL), a software emulator that provides better performance. With Montecito, Intel therefore eliminated hardware support for IA-32 code.
 
In 2006, with the release of [[Montecito (processor)|Montecito]], Intel made a number of enhancements to the basic processor architecture including:<ref>{{cite web
| url=http://www.intel.com/products/processor/itanium/index.htm
| title=Intel product announcement
| accessdate=2007-05-16
| work=[[Intel]] web site
}}{{dead link|date=November 2011}}</ref>
* Hardware multithreading: Each processor core maintains context for two threads of execution. When one thread stalls during memory access, the other thread can execute. Intel calls this "coarse multithreading" to distinguish it from the "[[hyper-threading]] technology" Intel integrated into some [[x86]] and [[x86-64]] microprocessors. Coarse multithreading is well matched to the ''Intel Itanium Architecture'' and results in an appreciable performance gain.
* Hardware support for [[Hardware-assisted virtualization|virtualization]]: Intel added Intel Virtualization Technology (Intel VT-i), which provides hardware assists for core virtualization functions. Virtualization allows a software "[[hypervisor]]" to run multiple operating system instances on the processor concurrently.
*Cache enhancements: Montecito added a split L2 cache, which included a dedicated 1&nbsp;MB L2 cache for instructions. The original 256&nbsp;kB L2 cache was converted to a dedicated data cache. Montecito also included up to 12&nbsp;MB of on-die L3 cache.
 
== Hỗ trợ phần cứng ==
 
=== Hệ thống ===
|[[Huawei]] || 2012 || now || ???? || ????
|}
 
{{As of|2012}} only a few manufacturers offer Itanium systems, including [[Hewlett-Packard|HP]], [[Groupe Bull|Bull]], [[NEC]], [[Inspur]] and [[Huawei]]. In addition, [[Intel]] offers a chassis that can be used by [[system integrator]]s to build Itanium systems.<ref>{{cite web
| url=http://support.intel.com/support/motherboards/server/SR9000MK4U/sb/CS-023638.htm
| title=Intel Server System SR9000MK4U Technical Product Specification
| accessdate=2007-04-14
| last=
| first=
| authorlink=
| month=January
| year=2007
| work=[[Intel]] web site
}}</ref>
HP, the only one of the industry's top four server manufacturers to offer Itanium-based systems today, manufactures at least 80% of all Itanium systems. HP sold 7200 systems in the first quarter of 2006.<ref>{{cite web
| url=http://www.theregister.co.uk/2006/06/01/itanic_q1_gartner/
| title=HP grabs 90% of 'industry standard' Itanic market
| accessdate=2007-01-28
| last=Vance
| first=Ashlee
| authorlink=Ashlee Vance
| date= 2006-06-01
| work=[[The Register]]
}}</ref>
The bulk of systems sold are [[enterprise server]]s and machines for large-scale technical computing, with an average selling price per system in excess of [[United States dollar|US$]]200,000. A typical system uses eight or more Itanium processors.
 
=== Chipset ===
 
The Itanium bus interfaces to the rest of the system via a [[chipset]]. Enterprise server manufacturers differentiate their systems by designing and developing chipsets that interface the processor to memory, interconnections, and peripheral controllers. The chipset is the heart of the system-level architecture for each system design. Development of a chipset costs tens of millions of dollars and represents a major commitment to the use of the Itanium. IBM created a chipset in 2003, and Intel in 2002, but neither of them has developed chipsets to support newer technologies such as [[DDR2 SDRAM|DDR2]] or [[PCI Express]].<ref name="zdnet_uk">{{cite web
| url=http://news.zdnet.co.uk/hardware/0,1000000091,39189451,00.htm
| title=Itanium dealt another blow
| accessdate=2007-03-24
| last=Shankland
| first=Stephen
| authorlink=
| date= 2005-02-28
| work=[[ZDNet]].co.uk
}}</ref>
Currently, modern chipsets for Itanium supporting such technologies are manufactured by HP, Fujitsu, SGI, NEC, and Hitachi.
 
The "Tukwila" Itanium processor model has been designed to share a common chipset with the Intel Xeon processor EX (Intel’s Xeon processor designed for four processor and larger servers). The goal is to streamline system development and reduce costs for server OEMs, many of whom develop both Itanium- and Xeon-based servers.
 
== Hỗ trợ phần mềm ==
 
{{As of|2010}}, Itanium hỗ trợ một số [[hệ điều hành]]:
 
* [[Windows Server 2003]] và [[Windows Server 2008]]
* [[HP-UX]] 11i
* [[OpenVMS]] I64
* [[NonStop]] OS
* các dòng [[phân phối của GNU/Linux]] (bao gồm [[Debian]], [[Ubuntu (hệ điều hành)|Ubuntu]], [[Gentoo Linux|Gentoo]], [[Red Hat]] và Novell [[SuSE]])
* [[FreeBSD]]/ia64<ref>{{cite web
| url=http://www.freebsd.org/platforms/ia64/index.html
| title=FreeBSD/ia64 Project
| accessdate=2007-12-01
| work=www.freebsd.org
}}</ref>
* [[General Comprehensive Operating System|Bull GCOS]]
* [[Advanced Comprehensive Operating System|NEC ACOS]]
 
However, Microsoft announced in 2010 that Windows Server 2008 R2 will be the last version of Windows Server to support the Itanium, and that it would also discontinue development of the Itanium versions of [[Visual Studio]] and [[Microsoft SQL Server|SQL Server]].<ref name="last_ms">{{cite web
| url=http://blogs.technet.com/windowsserver/archive/2010/04/02/windows-server-2008-r2-to-phase-out-itanium.aspx
| title=Windows Server 2008 R2 to Phase Out Itanium
| accessdate=2010-04-03
| last=Reger
| first=Dan
| authorlink=
| month=April
| year=2010
| work=
}}</ref>
Likewise, [[Red Hat Enterprise Linux]] 5 was the last Itanium edition of Red Hat Enterprise Linux<ref name="last_rhel">{{cite news
| author=Timothy Prickett Morgan
| title=Red Hat pulls plug on Itanium with RHEL 6
| url=http://www.theregister.co.uk/2009/12/18/redhat_rhel6_itanium_dead/
| work=[[The Register]]
| date=2009-12-18
| accessdate=2009-12-18
}}</ref>
and [[Canonical Ltd|Canonical]]'s Ubuntu 10.04 LTS was the last supported Ubuntu release on Itanium.<ref>{{cite web
| title=Canonical discontinues Itanium and SPARC support in Ubuntu
| url=http://www.h-online.com/open/news/item/Canonical-discontinues-Itanium-and-SPARC-support-in-Ubuntu-1062860.html
| work=[[The H]]
| date=2010-08-20
| accessdate=2010-08-23}}</ref>
HP will not be supporting or certifying Linux on Itanium 9300 (Tukwila) servers.<ref>{{cite web
| author=[[Hewlett-Packard]]
| title=Linux on HP Integrity servers based on the Intel Itanium Processor 9100 series
| url=http://h20341.www2.hp.com/integrity/w1/en/os/linux-on-integrity-overview.html
| accessdate=2010-08-23}}</ref>
 
[[Oracle Corporation]] announced in March 2011 that it would drop development of application software for Itanium platforms, with the explanation that "Intel management made it clear that their strategic focus is on their x86 microprocessor and that Itanium was nearing the end of its life."<ref name="pcworld2011"/>
 
HP sells a [[Operating system-level virtualization|virtualization]] technology for Itanium called [[Integrity Virtual Machines]].
 
To allow more software to run on the Itanium, Intel supported the development of compilers optimized for the platform, especially its own suite of compilers.<ref>{{cite web
| url=http://www.gamasutra.com/newswire/bit_blasts/20001108/index4.htm
| title=Intel Announces New Compiler Versions for the Itanium and Pentium 4
| accessdate=2007-06-05
| last=Barker
| first=Matt
| authorlink=
| date= 2000-11-08
| work=Gamasutra ([[CMP Media]] Game Group)
| archiveurl=http://web.archive.org/web/20050819174251/http://www.gamasutra.com/newswire/bit_blasts/20001108/index4.htm
| archivedate= 2005-08-19
}}</ref><ref>{{cite web
| url=http://www.intel.com/cd/software/products/asmo-na/eng/compilers/284132.htm
| title=Intel Compilers
| accessdate=2007-05-16
| work=[[Intel]] web site
}}</ref>
Starting in November 2010, with the introduction of new product suites, the Intel Itanium Compilers were no longer bundled with the Intel x86 compilers in a single product. Intel offers Itanium tools and Intel x86 tools, including compilers, independently in different product bundles.
[[GNU Compiler Collection|GCC]],<ref>{{cite web
| url=http://gcc.gelato.org/
| title=Gelato GCC Wiki
| accessdate=2007-05-16
| work=[[Gelato Federation]] web site
}}</ref>
<ref>{{cite web
| url=http://gcc.gnu.org/install/specific.html#ia64-x-linuxIA-32
| title=Documentation at GNU.org
| accessdate=2007-05-16
| work=[[GNU Project]] web site
}}</ref>
[[Open64]] and [[Microsoft Visual Studio]] 2005 (and later)<ref>{{cite web
| url=http://msdn2.microsoft.com/en-us/library/hs24szh9(VS.80).aspx
| title=Visual C++ Editions
| accessdate=2008-01-05
| work=[[Microsoft]]
}}</ref>
are also able to produce machine code for Itanium. According to the Itanium Solutions Alliance over 13,000 applications were available for Itanium based systems in early 2008,<ref>{{cite web
| url=http://www.informationweek.com/news/hardware/processors/showArticle.jhtml?articleID=207801059
| title=Computers with Next-Gen Itanium Expected Early Next Year
| accessdate=2008-10-17
| last=Gonsalves
| first=Aantone
| date= 2008-05-19
| work=InformationWeek
}}</ref>
though Sun has contested Itanium application counts in the past.<ref name="Sun1">{{cite web
| url=http://www.writefullyyours.com/pdf/Sun%20Reality%20Check-Itanium.pdf
| format=PDF
| title=Sun Microsystems-Reality Check
| accessdate=2008-10-16
| last=
| first=
| authorlink=
| date= 2007-01-12
| work=Sun Microsystems white paper
}}</ref>
The ISA also supports [[Gelato Federation|Gelato]], an Itanium HPC user group and developer community that ports and supports [[open source]] software for Itanium.<ref>{{cite web
| url=http://www.gelato.org/
| title=Gelato Developing for Linux on Itanium
| accessdate=2007-05-16
| work=[[Gelato Federation]] web site
}}</ref>
 
=== Cạnh tranh ===
 
[[Emulator|Emulation]] is a technique that allows a computer to execute binary code that was compiled for a different type of computer. Before IBM's acquisition of [[QuickTransit]] in 2009, application binary software for [[IRIX]]/[[MIPS architecture|MIPS]] and [[Solaris Operating System|Solaris]]/[[SPARC]] could run via type of emulation called "dynamic binary translation" on Linux/Itanium. Similarly, HP implemented a method to execute PA-RISC/HP-UX on the Itanium/HP-UX via emulation, to simplify migration of its PA-RISC customers to the radically different Itanium instruction set. Itanium processors can also run the mainframe environment [[General Comprehensive Operating System|GCOS]] from [[Groupe Bull]] and several [[x86]] operating systems via [[Instruction Set Simulator]]s.
 
== Competition ==
 
Itanium is aimed at the [[enterprise server]] and [[high-performance computing]] (HPC) markets. Other enterprise- and HPC-focused processor lines include [[Oracle Corporation]]'s [[SPARC T4]], [[Fujitsu]]'s [[SPARC64 VII+]] and [[IBM]]'s [[POWER7]]. Measured by quantity sold, Itanium's most serious competition comes from [[x86-64]] processors including [[Intel]]'s own [[Xeon]] line and [[Advanced Micro Devices|AMD]]'s [[Opteron]] line. {{As of|2009}}, most servers were being shipped with x86-64 processors.<ref name="Gartner 2009-q4"/>
 
In 2005, Itanium systems accounted for about 14% of HPC systems revenue, but the percentage has declined as the industry shifts to x86-64 clusters for this application.<ref>{{cite web
| url=http://www.theinquirer.net/gb/inquirer/news/2008/09/24/idc-performance-computing
| title=Supercomputing now dominated by X86 architecture
| accessdate=2008-09-27
| last=Novakovic
| first=Nebojsa
| authorlink=
| date= 2008-09-25
| work=[[The Inquirer]]
}}</ref>
 
An October 2008 paper by Gartner on the Tukwila processor stated that "...the future roadmap for Itanium looks as strong as that of any RISC peer like Power or SPARC."<ref>{{cite web
| url=http://www.gartner.com/DisplayDocument?ref=g_rss&id=770312
| title=Preparing for Tukwila: The Next Generation of Intel's Itanium Processor Family
| accessdate=2008-10-21
| last=Butler
| first=Andrew
| date= 2008-10-03
}}</ref>
 
== Supercomputers and high-performance computing ==
 
[[Image:Processor families in TOP500 supercomputers.svg|thumb|right|300px|Percentage of [[Top500]] systems]]
 
An Itanium-based computer first appeared on the list of the [[TOP500]] [[supercomputers]] in November 2001.<ref name="Thunder"/> The best position ever achieved by an ''Itanium 2'' based system in the list was #2, achieved in June 2004, when Thunder (LLNL) entered the list with an Rmax of 19.94 Teraflops. In November 2004, [[Columbia (supercomputer)|Columbia]] entered the list at #2 with 51.8 Teraflops, and there was at least one Itanium-based computer in the top 10 from then until June 2007. The peak number of Itanium-based machines on the list occurred in the November 2004 list, at 84 systems (16.8%); by June 2010, this had dropped to five systems (1%).<ref>{{cite web
| url=http://www.top500.org/stats/list/35/procfam
| title=Processor Family share for 06/2010
| accessdate=2010-06-01
| work=[[TOP500]] web site
}}</ref>
 
== Processors ==
 
=== Released processors ===
 
The Itanium processors show a progression in capability. Merced was a proof of concept. McKinley dramatically improved the memory hierarchy and allowed Itanium to become reasonably competitive. Madison, with the shift to a 130&nbsp;nm process, allowed for enough cache space to overcome the major performance bottlenecks. Montecito, with a 90&nbsp;nm process, allowed for a dual-core implementation and a major improvement in performance per watt. Montvale added three new features: core-level lockstep, demand-based switching and front-side bus frequency of up to 667&nbsp;MHz.
 
<center>
{| class="wikitable"
|-
![[List of Intel codenames|Codename]] || process || Released || | Clock || L2 [[CPU cache|Cache]]/<br />core || L3 [[CPU cache|Cache]]/<br />core || [[Front Side Bus|Bus]] || [[die (integrated circuit)|dies]]/<br />device || cores/<br />[[die (integrated circuit)|die]] || [[watt]]s/<br />device || Comments
|-
! colspan="11" style="background:#ffebad;"| Itanium
|-
| rowspan="2" style="vertical-align:top;"|Merced || rowspan="2" |[[180 nanometer|180&nbsp;nm]] || rowspan="2" |2001-06 || 733&nbsp;MHz || rowspan="2" | 96 kB || rowspan="2"| none || rowspan="2" | 266&nbsp;MHz || rowspan="2" |1 || rowspan="2" |1 || 116 || 2&nbsp;MB off-die L3 cache
|-
| 800&nbsp;MHz || 130 || 4&nbsp;MB off-die L3 cache
|-
! colspan="11" style="background:#ffebad;"| Itanium 2
|-
| rowspan="2" style="vertical-align:top;"|McKinley || rowspan="2" |[[180 nanometer|180&nbsp;nm]] || rowspan="2" |2002-07-08 || 900&nbsp;MHz || rowspan="15" | 256 kB || 1.5&nbsp;MB || rowspan="9" | 400&nbsp;MHz || rowspan="9" |1 || rowspan="9" |1 || 130 || rowspan="2" style="vertical-align:top;"| HW branchlong
|-
| 1&nbsp;GHz || 3&nbsp;MB || 130
|-
| rowspan="6" style="vertical-align:top;" | Madison || rowspan="13" | [[130 nanometer|130&nbsp;nm]] || rowspan="3" | 2003-06-30 || 1.3&nbsp;GHz || 3&nbsp;MB || 130 ||
|-
|1.4&nbsp;GHz || 4&nbsp;MB || 130 ||
|-
|1.5&nbsp;GHz || 6&nbsp;MB || 130 ||
|-
|2003-09-08 || 1.4&nbsp;GHz || 1.5&nbsp;MB || 130 ||
|-
|rowspan="2" |2004-04 || 1.4&nbsp;GHz || rowspan=2 | 3&nbsp;MB || rowspan=2| 130 ||
|-
|1.6&nbsp;GHz ||
|-
|Deerfield || 2003-09-08 || 1.0&nbsp;GHz || 1.5&nbsp;MB || 62 || Low voltage
|-
|Hondo<ref>[http://www.theregister.co.uk/2004/05/06/hp_mx2_itaniummodule/ HP rides Hondo to super-sized Itanium servers] The Register, 6th May 2004</ref> || 2004-Q1 || 1.1&nbsp;GHz || 4&nbsp;MB || 400&nbsp;MHz || 2 || 1 || 260 || 32&nbsp;MB L4
|-
| rowspan="2" style="vertical-align:top;"|Fanwood || rowspan="2" |2004-11-08 || 1.6&nbsp;GHz || rowspan=2| 3&nbsp;MB || 533&nbsp;MHz || rowspan="5" | 1 || rowspan="5" | 1 || 130 ||
|-
|1.3&nbsp;GHz || 400&nbsp;MHz || 62? || Low voltage
|-
| rowspan="3" style="vertical-align:top;"|Madison || 2004-11-08 || 1.6&nbsp;GHz || 9&nbsp;MB || 400&nbsp;MHz || 130 ||
|-
|2005-07-05 || 1.67&nbsp;GHz || 6&nbsp;MB || 667&nbsp;MHz || 130 ||
|-
|2005-07-18 || 1.67&nbsp;GHz || 9&nbsp;MB || 667&nbsp;MHz || 130 ||
|-
! colspan="11" style="background:#ffebad;"| Itanium 2 9000 series
|-
| rowspan="2" style="vertical-align:top;"|[[Montecito (processor)|Montecito]] || rowspan="2" |[[90 nanometer|90&nbsp;nm]] || rowspan="2" |2006-07-18 || 1.4&nbsp;GHz || rowspan="2" | 256 kB (D)+<br />1&nbsp;MB (I) || rowspan=2| 6–24&nbsp;MB || 400&nbsp;MHz || rowspan=2|1 || rowspan=2|2 || rowspan=2|104 || rowspan="2" style="vertical-align:top;"|Virtualization, Multithread, no HW IA-32
|-
| 1.6&nbsp;GHz || 533&nbsp;MHz
|-
! colspan="11" style="background:#ffebad;"| Itanium 2 9100 series
|-
|valign="top"|Montvale || [[90 nanometer|90&nbsp;nm]] || 2007-10-31 || 1.42–1.66&nbsp;GHz || 256 kB (D)+<br />1&nbsp;MB (I) || 8–24&nbsp;MB || 400–667&nbsp;MHz || 1 || 1–2 || 75–104 || valign="top"|Core-level lockstep, demand-based switching
|-
! colspan="11" style="background:#ffebad;"| Itanium 9300 series
|-
|valign="top"|[[Tukwila (processor)|Tukwila]] || [[65 nanometer|65&nbsp;nm]] || 2010-02-08 || 1.33-1.73&nbsp;GHz || 256&nbsp;kB (D)+<br />512 kB (I) || 10–24&nbsp;MB || QPI with a speed of 4.8 [[Transfer (computing)|GT]]/s || 1 || 2–4 || 130–185 || valign="top"|A new point-to-point processor interconnect, the [[Intel QuickPath Interconnect|QPI]], replacing the [[Front-side bus|FSB]]. [[Turbo Boost]]
|}
</center>
 
=== Các vi xử lý tương lai ===
 
{{As of|2009|12}}, một vài thông tin nghiên cứu khảo sát về các vi xử lý Itanium tương lai và một số định hướng được công bố.
 
==== Poulson ====
 
''Poulson'' will be the follow-on processor to Tukwila and is planned for release in 2012.<ref>[http://www.eweek.com/c/a/IT-Infrastructure/New-Intel-Itanium-Offers-Greater-Performance-Memory-Capacity-349863/1/ New Intel Itanium Offers Greater Performance, Memory Capacity: Itanium 9300 Series Brings New Features (page 2)] eweek.com, 2010-02-08</ref>
According to Intel, it will skip the [[45 nanometer|45&nbsp;nm]] process technology and use a [[32 nanometer|32&nbsp;nm]] process technology; it will feature eight cores, have a 12-wide issue architecture, multithreading enhancements, and new instructions to take advantage of parallelism, especially in virtualization.<ref name="Kittson"/><ref>{{cite web
| url=http://www.realworldtech.com/page.cfm?ArticleID=RWT051811113343
| title=Poulson: The Future of Itanium Servers
| publisher=realworldtech.com
| date=2011-05-18
| accessdate=2011-05-24}}</ref>
<ref name="HotChip-Poulson">{{cite web
| url=http://newsroom.intel.com/servlet/JiveServlet/download/38-5835/Hot%20Chips%20%20Poulson%20disclosure%20Factsheet.pdf
| format=PDF
| title=Hot Chips Poulson Disclosure Factsheet
| accessdate=2011-08-19
| last=
| first=
| authorlink=
| date= 2011-08-19
| work=Intel press release
}}</ref>
Poulson has the world's biggest L3 cache size — 54 MB (32MB for Tukwila). L2 cache size is 6 MB, 768 kB per core{{Citation needed|date=August 2011}}. Die size is 544&nbsp;mm², less than its predecessor Tukwila (698.75&nbsp;mm²).<ref>{{cite web
| url=http://www.eetimes.com/electronics-news/4210958/Researchers-carve-CPU-into-plastic-foil
| title=Researchers carve CPU into plastic foil
| publisher=Eetimes.com
| accessdate=2010-12-19}}</ref>
 
At [[International Solid-State Circuits Conference|ISSCC]] 2011, Intel presented a paper called, "A 32nm 3.1 Billion Transistor 12-Wide-Issue Itanium Processor for Mission Critical Servers."<ref>{{cite web
| url=http://isscc.org/doc/2011/isscc2011.advanceprogramflyerfinal.pdf
| title=ISSCC 2011
| format=PDF
| accessdate=2011-11-20}}</ref>
<ref>{{cite web
| url=http://dx.doi.org/10.1109/ISSCC.2011.5746230
| title=A 32nm 3.1 billion transistor 12-wide-issue Itanium® processor for mission-critical servers
| format=PDF
| date=2011-02-24
| accessdate=2012-01-23}}</ref>
Given Intel's history of disclosing details about Itanium microprocessors at ISSCC, this paper most likely refers to Poulson. Analyst David Kanter speculates that Poulson will use a new microarchitecture, with a more advanced form of multi-threading that uses as many as four threads, to improve performance for single threaded and multi-threaded workloads.<ref>{{cite web
| url=http://www.realworldtech.com/page.cfm?ArticleID=RWT111710021604
| title=Preparing for Tukwila: The Next Generation of Intel's Itanium Processor Family
| accessdate=2010-11-17
| last=Kanter
| first=David
| date= 2010-11-17
| work=Real World Tech
}}</ref>
Một số thông tin mới được công bố tại diễn đàn thảo luận [[Hotchips]].<ref>{{cite web
| url=http://communities.intel.com/community/openportit/server/blog/2011/08/19/itanium-poulson-update--greater-parallelism-new-instruction-replay-more-catch-the-details-from-hotchips
| title=Itanium Poulson Update - Greater Parallelism, New Instruction Replay & More: Catch the details from Hotchips!
| date= 2011-08-19
| accessdate=2012-01-23}}</ref>
<ref>{{cite web
| url=http://www.slideshare.net/PaulineNist/intel-itanium-poulson-update-at-hotchips
| title=Intel Itanium Hotchips 2011 Overview
| accessdate=2012-01-23}}</ref>
New information presents improvements in multithreading, resilency improvements (Instruction Replay RAS) and few new instructions (thread priority, integer instruction, cache prefetching, data access hints).
 
==== Kittson ====
 
| work=[[IBM]] web site
}}</ref>
** Tháng 10: [[Project Monterey]] is formed to create a common [[UNIX]] for IA-64
*'''1999:'''
** February: [[Project Trillian]] is formed to port [[Linux]] to IA-64
**August: IDC predicts IA-64 systems sales will reach $25bn/yr by 2002<ref name="IDC_chart"/>
**October: Intel announces the ''Itanium'' name
**October: the term ''Itanic'' is first used in ''The Register''<ref name="Reg_Itanic"/>
 
*'''2000:'''
** February: [[Project Trillian]] delivers source code
** June: IDC predicts Itanium systems sales will reach $25bn/yr by 2003<ref name="IDC_chart"/>
** July: Sun and Intel drop Solaris-on-Itanium plans<ref>{{cite news
| author=Stephen Shankland
| title=Sun, Intel part ways on Solaris plans
| url=http://news.com.com/Sun,+Intel+part+ways+on+Solaris+plans/2100-1001_3-243489.html
| publisher=[[CNET]] News.com
| date= 2000-07-21
| accessdate=2007-04-25
}}</ref>
** August: AMD releases specification for [[x86-64]], a set of 64-bit extensions to Intel's own x86 architecture intended to compete with IA-64. It will eventually market this under the name "AMD64"
*'''2001:'''
** June: IDC predicts Itanium systems sales will reach $15bn/yr by 2004<ref name="IDC_chart"/>
** June: [[Project Monterey]] dies
** July: Itanium is released
** October: IDC predicts Itanium systems sales will reach $12bn/yr by the end of 2004<ref name="IDC_chart"/>
** November: IBM's 320-processor Titan NOW Cluster at [[National Center for Supercomputing Applications]] is listed on the [[TOP500]] list at position #34<ref name="Thunder"/>
** November: Compaq delays Itanium Product release due to problems with processor<ref>{{cite web
| url=http://www.news.com/Itanium-flunking-Compaq-server-tests/2100-1001_3-275850.html
| title=Itanium flunking Compaq server tests
| accessdate=2007-11-13
| last=Kanellos
| first=Michael
| authorlink=
| date= 2001-11-14
| work=News.com
}}</ref>
** December: [[Gelato Federation|Gelato]] is formed
*'''2002:'''
** March: IDC predicts Itanium systems sales will reach $5bn/yr by end 2004<ref name="IDC_chart"/>
** June: Itanium 2 is released
*'''2003:'''
** April: IDC predicts Itanium systems sales will reach $9bn/yr by end 2007<ref name="IDC_chart"/>
** April: AMD releases [[Opteron]], the first processor with x86-64 extensions
** June: Intel releases the "Madison" Itanium 2
*'''2004:'''
** February: Intel announces it has been working on its own x86-64 implementation (which it will eventually market under the name "Intel 64")
** June: Intel releases its first processor with x86-64 extensions, a [[Xeon]] processor codenamed "Nocona"
** June: ''Thunder'', a system at [[Lawrence Livermore National Laboratory|LLNL]] with 4096 Itanium 2 processors, is listed on the [[TOP500]] list at position #2<ref>{{cite web
| url=http://www.top500.org/system/ranking/6762
| title=Thunder at TOP500
| accessdate=2007-05-16
| work=[[TOP500]] web site
}}</ref>
** November: ''[[Columbia (supercomputer)|Columbia]]'', an [[Silicon Graphics|SGI]] [[Altix]] 3700 with 10160 Itanium 2 processors at NASA Ames Research Center, is listed on the [[TOP500]] list at position #2.<ref>{{cite web
| url=http://www.top500.org/system/7288
| title=Columbia at TOP500
| accessdate=2007-05-16
| work=[[TOP500]] web site
}}</ref>
** December: Itanium system sales for 2004 reach $1.4bn
*'''2005:'''
** January: HP ports [[OpenVMS]] to Itanium<ref>{{cite web
| url=http://www.itjungle.com/breaking/bn070605-story01.html
| title=HP Ramps Up OpenVMS on Integrity Servers
| accessdate=2007-03-29
| last=Morgan
| first=Timothy
| authorlink=
| date= 2005-07-06
| work=ITJungle.com
}}</ref>
** February: IBM server design drops Itanium support<ref name="zdnet_uk"/><ref>{{cite web
| url=http://articles.techrepublic.com.com/5100-1035_11-5590270.html
| title=IBM server design drops Itanium support
| accessdate=2007-03-19
| last=
| first=
| authorlink=
| date= 2005-02-25
| work=[[TechRepublic]].com
}}</ref>
** June: An Itanium 2 sets a record [[SPECfp]]2000 result of 2,801<ref>{{cite web
| url=http://www.spec.org/cpu2000/results/res2005q3/cpu2000-20050628-04342.html
| title=Result submitted to SPEC on June 13, 2005 by Hitachi
| accessdate=2007-05-16
| work=[[Standard Performance Evaluation Corporation|SPEC]] web site
}}</ref>
in a [[Hitachi, Ltd.]] [[Computing blade]].
** September: Itanium Solutions Alliance is formed<ref>{{cite web
| url=http://www.byteandswitch.com/document.asp?doc_id=81342
| title=Itanium Solutions Alliance Formed
| accessdate=2007-03-24
| last=
| first=
| authorlink=
| date= 2005-09-26
| work=Byte and Switch
}}{{dead link|date=April 2011}}</ref>
** September: Dell exits the Itanium business<ref>{{cite web
| url=http://news.com.com/Dell+shuttering+Itanium+server+business/2100-1006_3-5867239.html
| title=Dell shuttering Itanium server business
| accessdate=2007-03-19
| last=Shankland
| first=Stephen
| authorlink=
| date= 2005-09-15
| work=[[CNET]] News.com
}}</ref>
** October: Itanium server sales reach $619M/quarter in the third quarter.
** October: Intel announces one-year delays for Montecito, Montvale, and Tukwila<ref name="zdnet_2005_slip"/>
*'''2006:'''
** January: Itanium Solutions Alliance announces a $10bn collective investment in Itanium by 2010
** February: IDC predicts Itanium systems sales will reach $6.6bn/yr by 2009<ref name="IDC 2006"/>
** June: Intel releases the dual-core "[[Montecito (processor)|Montecito]]" Itanium 2 9000 series<ref>{{cite web
| url=http://www.eweek.com/article2/0,1759,1990766,00.asp
| title=Is 'Montecito' Intel's Second Chance for Itanium?
| accessdate=2007-03-23
| last=Preimesberger
| first=Chris
| authorlink=
| date= 2006-07-19
| work=[[eWeek]]
}}</ref>
*'''2007:'''
** April: [[CentOS]] ([[Red Hat Enterprise Linux|RHEL]]-clone) places Itanium support on hold for the 5.0 release<ref>{{cite web
| url=http://www.centos.org/product.html
| title=CentOS Product Specifications
| publisher=Centos.org
| accessdate=2011-04-12}}</ref>
** October: Intel releases the "[[Montvale (processor)|Montvale]]" Itanium 2 9100 series.
** November: Intel renames the family from ''Itanium 2'' back to ''Itanium''.
*'''2009:'''
** December: Red Hat announces that it is dropping support for Itanium in the next release of its enterprise OS, Red Hat Enterprise Linux 6.<ref>{{cite news
| first=Mikael
| last=Ricknäs
| date= 2009-12-21
| title=Red Hat to Drop Itanium Support in Enterprise Linux 6
| work=PC World
| publisher=PCWorld Communications, Inc
| url=http://www.pcworld.com/article/185196/red_hat_to_drop_itanium_support_in_enterprise_linux_6.html
| accessdate=2011-03-25 }}</ref>
*'''2010:'''
** February: Intel announces the "Tukwila" Itanium 9300 series.<ref name="eweek-tukwila"/>
** April: Microsoft announces phase-out of support for Itanium.<ref>{{cite web
| url=http://www.pcworld.com/article/193426/microsoft_ending_support_for_itanium.html
| title=Microsoft Ending Support for Itanium
| accessdate=2010-04-05
| last=Niccolai
| first=James
| authorlink=
| date= 2009-05-08
| work=PCWorld
}}</ref>
** October: Intel announces new releases of [[Intel C++ Compiler]] and [[Intel Fortran Compiler]] for x86/x64, while Itanium support is only available in older versions.<ref>{{cite web
| url=http://software.intel.com/file/31854
| title=Intel C++ Composer XE 2011 for Linux Installation Guide and Release Notes
| accessdate=2011-04-12}}</ref>
*'''2011:'''
** March: [[Oracle Corporation]] announces that it will stop developing application software, middleware, and [[Oracle Linux]] for the Itanium.<ref name="pcworld2011">{{cite web
| url=http://www.pcworld.com/businesscenter/article/222936/oracle_stops_developing_software_for_intels_itanium_chips.html
| title=Oracle stops developing software for Intel's Itanium Chips
| publisher=Pcworld.com
| date=2011-03-22
| accessdate=2011-04-12}}</ref>
** March: [[Intel]] and [[HP]] reiterate their support of Itanium.<ref name="IntelItanium">{{cite web
| url=http://newsroom.intel.com/community/intel_newsroom/blog/2011/03/23/chip-shot-intel-reaffirms-commitment-to-itanium
| title=Intel Reaffirms Commitment to Itanium
| publisher=Newsroom.intel.com
| date=2011-03-23
| accessdate=2011-04-12}}</ref><ref name="HPItanium">{{cite web
| last=McLaughlin
| first=Kevin
| url=http://www.crn.com/news/data-center/229400474/hp-ceo-apotheker-slams-oracle-for-quitting-itanium.htm
| title=HP CEO Apotheker Slams Oracle For Quitting Itanium
| publisher=Crn.com
| date=2011-03-28
| accessdate=2011-04-12}}</ref>
** April: [[Huawei]] và [[Inspur]] thông báo sẽ phát triển các máy chủ Itanium.<ref>{{cite web
| last=Prickett
| first=Timothy
| url=http://www.theregister.co.uk/2011/04/14/huawei_inspur_itanium_servers/
| title=Huawei to forge big red Itanium iron
| publisher=Theregister.co.uk
| date=2011-04-14
| accessdate=2011-11-20}}</ref>
*'''2012:'''
** February: Court papers were released from a case between HP and Oracle Corporation that gave insight to the fact that HP was paying Intel $690 Million to keep Itanium on life support. <ref>{{cite web
| last=McMillan
| first=Robert
| url=http://www.wired.com/wiredenterprise/2012/02/hp-itanium/
| title=HP Paid Intel $690 Million To Keep Itanium On Life Support
| publisher=wired.com
| date=2012-02-01
| accessdate=2012-02-03}}</ref>
 
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